Low dropout regulators generate a regulated voltage output using a low voltage overhead between input and output. In a low dropout regulator, the input voltage may be as low as one volt above the regulated output voltage, making it suitable for use in applications where high voltage overheads are not available.
In order for integrated circuit low dropout regulators to function with a low voltage overhead, a PNP transistor is used as the output structure to conduct current to the output load. Since the PNP transistor is a low beta transistor, up to forty percent of the power delivered to the regulator may be wasted for quiescent biasing under a full load on the regulator. This power loss can result in excessive heating of the regulator and of the circuit board.
Presently, the power loss associated with the PNP transistor is reduced by optimizing the output transistor efficiency at a set load current by area scaling the output transistor. Whereas this technique works for specialized applications, it requires designing a new regulator for each minor application change. Furthermore, the solution does not prevent the waste of input power or the excessive regulator and board heating.
Therefore, a need has arisen for an integrated circuit low dropout regulator which efficiently utilizes the input power to reduce power loss and undesirable heating.